OUT1
PWM LOGIC
STEP DOWN
CURRENT LIMIT
PWM ERROR
COMPARATOR
CURRENT-LIMIT
CONTROL
LX1
PGND1
PA OUT
BYPASS FET
REFIN
R1
R2
R3
R5
R4
R6
R7
C2
C1
RFEN2
R7
ERROR
AMP
LDO
CURRENT LIMIT
BANDGAP
LDO
OUT2
LX2
V
CC
1.25V
REFERENCE
REFBP
BANDGAP
PAEN
IN1
CONTROL
LOGIC
RFEN1
OUT1
EN
OUT1
EN
PGND2
OUT2
PWM LOGIC
IN2
EN
FB NETWORK/
COMPENSATION
EN
BIAS
AGND
OUT2
V
CC
R9
BANDGAP
Figure 1. Block Diagram
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
______________________________________________________________________________________ 11
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